Embedded baseband processors, such as those used in wireless applications, may include a digital signal processor, a microcontroller and memory on a single chip. In wireless applications, processing speed is critical because of the need to maintain synchronization with the timing of the wireless system. The processing speed of the microcontroller is largely determined by the associated memory systems and in particular by a flash memory system that is external to the baseband processor. One way of improving processing speed is to copy code from the external memory to the internal chip memory, which may run at processor speed and may have a larger bus width than the external memory. However, the code base may exceed the capacity of the on-chip memory. In addition, on-chip memory is utilized, at least in part, for data storage in addition to code storage.
One option to improve microcontroller speed is to add a cache memory. However, the code structure for a typical communications processor is such that little improvement is achieved by the use of cache memory. In particular, the code may be written such that a large portion of the code is utilized on each pass. The code structure includes many function calls and conditional code. The result is that program flow is typically discontinuous, resulting in poor cache performance.
Burst mode flash memories may be utilized to fill cache memories more quickly. A burst mode flash memory is one in which accessing the first word of a burst takes about the same time as a traditional flash memory (70–120 nS typical), while accessing the following words of the burst is much faster (20–25 nS typical). A typical burst mode flash memory has a fixed burst length, for example, 4 words. By way of example, reading a burst of 4 words results in a possible total access time of 70+20+20+20 nS=130 nS, where reading these 4 words as single words would result in 4*70 nS=280 nS. A burst buffer may be used to read ahead of the microcontroller. A problem with this approach is that the microcontroller may need only a few of the instructions in the burst due to the program structure. In particular, words read from the flash memory may not be needed due to a program flow discontinuity. Thus, the use of a burst buffer does not produce a significant improvement in performance.
Accordingly, there is a need for improved methods and apparatus for utilizing the burst mode of flash memories to improve processor performance.